NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 466
NH82801FBM S L89K
Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet
1.NH82801FBM_S_L89K.pdf
(786 pages)
Specifications of NH82801FBM S L89K
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SATA Controller Registers (D31:F2)
466
Bit
4
3
2
1
0
Drive 1 Fast Timing Bank (TIME1) — R/W.
0 = Accesses to the data port will use compatible timings for this drive.
1 = When this bit =1 and bit 14 = 0, accesses to the data port will use bits 13:12 for the IORDY
Drive 0 DMA Timing Enable (DTE0) — R/W.
0 = Disable
1 = Enable fast timing mode for DMA transfers only for this drive. PIO transfers to the IDE data port
Drive 0 Prefetch/Posting Enable (PPE0) — R/W.
0 = Disable prefetch and posting to the IDE data port for this drive.
1 = Enable prefetch and posting to the IDE data port for this drive.
Drive 0 IORDY Sample Point Enable (IE0) — R/W.
0 = Disable IORDY sampling is disabled for this drive.
1 = Enable IORDY sampling for this drive.
Drive 0 Fast Timing Bank (TIME0) — R/W.
0 = Accesses to the data port will use compatible timings for this drive.
1 = Accesses to the data port will use bits 13:12 for the IORDY sample point, and bits 9:8 for the
sample point, and bits 9:8 for the recovery time. When this bit = 1 and bit 14 = 1, accesses to
the data port will use the IORDY sample point and recover time specified in the slave IDE
timing register.
will run in compatible timing.
recovery time
Intel
Description
®
I/O Controller Hub 6 (ICH6) Family Datasheet
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