NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 400
NH82801FBM S L89K
Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet
1.NH82801FBM_S_L89K.pdf
(786 pages)
Specifications of NH82801FBM S L89K
Lead Free Status / RoHS Status
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LPC Interface Bridge Registers (D31:F0)
10.8.1.6
400
BM_BREAK_EN Register (PM—D31:F0) (Mobile Only)
Offset Address:
Default Value:
Lockable:
Power Well:
Bit
4:3
7
6
5
2
1
0
IDE_BREAK_EN — R/W.
0 = Parallel IDE or Serial ATA traffic will not act as a break event.
1 = Parallel IDE or Serial ATA traffic acts as a break event, even if the BM_STS-ZERO_EN and
PCIE_BREAK_EN — R/W.
0 = PCI Express* traffic will not act as a break event.
1 = PCI Express traffic acts as a break event, even if the BM_STS-ZERO_EN and POPUP_EN bits
PCI_BREAK_EN — R/W.
0 = PCI traffic will not act as a break event.
1 = PCI traffic acts as a break event, even if the BM_STS-ZERO_EN and POPUP_EN bits are set.
Reserved
EHCI_BREAK_EN — R/W.
0 = EHCI traffic will not act as a break event.
1 = EHCI traffic acts as a break event, even if the BM_STS-ZERO_EN and POPUP_EN bits are
UHCI_BREAK_EN — R/W.
0 = UHCI traffic will not act as a break event.
1 = USB traffic from any of the internal UHCIs acts as a break event, even if the BM_STS-
ACAZ_BREAK_EN — R/W.
0 = AC ‘97 or Intel High Definition Audio traffic will not act as a break event.
1 = AC ‘97 or Intel High Definition Audio traffic acts as a break event, even if the BM_STS-
POPUP_EN bits are set. Parallel IDE or Serial ATA master activity will cause BM_STS to be set
and will cause a break from C3/C4.
are set. PCI Express master activity will cause BM_STS to be set and will cause a break from
C3/C4.
PCI master activity will cause BM_STS to be set and will cause a break from C3/C4.
set. EHCI master activity will cause BM_STS to be set and will cause a break from C3/C4.
ZERO_EN and POPUP_EN bits are set. UHCI master activity will cause BM_STS to be set and
will cause a break from C3/C4.
ZERO_EN and POPUP_EN bits are set. AC ‘97 or
Intel High Definition Audio master activity will cause BM_STS to be set and will cause a break
from C3/C4.
ABh
00h
No
Core
Intel
Description
®
I/O Controller Hub 6 (ICH6) Family Datasheet
Attribute:
Size:
Usage:
ACPI, Legacy
R/W
8-bit
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