NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 689

no-image

NH82801FBM S L89K

Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801FBM S L89K

Lead Free Status / RoHS Status
Compliant
19.1.24
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
DCAP—Device Capabilities Register
(PCI Express—D28:F0/F1/F2/F3)
Address Offset:
Default Value:
31:28
27:26
25:18
17:15
11:9
Bit
8:6
4:3
2:0
14
13
12
5
Reserved
Captured Slot Power Limit Scale (CSPS) — RO. Not supported.
Captured Slot Power Limit Value (CSPV) — RO. Not supported.
Reserved
Power Indicator Present (PIP) — RO. This bit indicates no power indicator is present on the root
port.
Attention Indicator Present (AIP) — RO. This bit indicates no attention indicator is present on the
root port.
Attention Button Present (ABP) — RO. This bit indicates no attention button is present on the root
port.
Endpoint L1 Acceptable Latency (E1AL) — RO. This field indicates more than 4 µs. This field
essentially has no meaning for root ports since root ports are not endpoints.
Endpoint L0 Acceptable Latency (E0AL) — RO. This field indicates more than 64 µs. This field
essentially has no meaning for root ports since root ports are not endpoints.
Extended Tag Field Supported (ETFS) — RO. This bit indicates that 8-bit tag fields are supported.
Phantom Functions Supported (PFS) — RO. No phantom functions supported.
Max Payload Size Supported (MPS) — RO. This field indicates the maximum payload size
supported is 128B.
44–47h
00000FE0h
Description
Attribute:
Size:
PCI Express* Configuration Registers
RO
32 bits
689

Related parts for NH82801FBM S L89K