NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 267
NH82801FBM S L89K
Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet
1.NH82801FBM_S_L89K.pdf
(786 pages)
Specifications of NH82801FBM S L89K
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Compliant
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7.1.44
7.1.45
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
D28IP—Device 28 Interrupt Pin Register
Offset Address:
Default Value:
D27IP—Device 27 Interrupt Pin Register
Offset Address:
Default Value:
31:16
15:12
11:8
31:4
Bit
7:4
3:0
Bit
3:0
Reserved
PCI Express #4 Pin (P4IP) — R/W. This field indicates which pin the PCI Express* port #4 drives
as its interrupt.
0h = No interrupt
1h = INTA#
2h = INTB#
3h = INTC#
4h = INTD# (Default)
5h–7h = Reserved
PCI Express #3 Pin (P3IP) — R/W. This field indicates which pin the PCI Express port #3 drives
as its interrupt.
0h = No interrupt
1h = INTA#
2h = INTB#
3h = INTC# (Default)
4h = INTD#
5h–7h = Reserved
PCI Express #2 Pin (P2IP) — R/W. This field indicates which pin the PCI Express port #2 drives
as its interrupt.
0h = No interrupt
1h = INTA#
2h = INTB# (Default)
3h = INTC#
4h = INTD#
5h–7h = Reserved
PCI Express #1 Pin (P1IP) — R/W. This field indicates which pin the PCI Express port #1 drives
as its interrupt.
0h = No interrupt
1h = INTA# (Default)
2h = INTB#
3h = INTC#
4h = INTD#
5h–7h = Reserved
Reserved
Intel High Definition Audio Pin (ZIP) — R/W. This field indicates which pin the Intel High
Definition Audio controller drives as its interrupt.
0h = No interrupt
1h = INTA# (Default)
2h = INTB#
3h = INTC#
4h = INTD#
5h–7h = Reserved
310C–310Fh
00004321h
3110–3113h
00000001h
Description
Description
Attribute:
Size:
Attribute:
Size:
Chipset Configuration Registers
R/W
32-bit
R/W
32-bit
267
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