NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 474

• Manufacturer Part Number: NH82801FBM S L89K
• Manufacturer: Intel

Specifications of NH82801FBM S L89K

• Lead Free Status / RoHS Status: Compliant

SATA Controller Registers (D31:F2)
12.1.31
.
474
SIR - SATA Initialization Register
Address Offset:
Default Value:
(Desktop
(Mobile
(Mobile
Only)
31:28
27:24
27:24
22:10
Bits
Only)
Only)
Bit
8:0
1
0
23
9
Reserved
Port 0 Enabled (P0E) — R/W.
0 = Disabled. The port is in the ‘off’ state and cannot detect any devices.
1 = Enabled. The port can transition between the on, partial, and slumber states and can detect
NOTE: This bit takes precedence over P0CMD.SUD (offset ABAR+118h:bit 1)
Reserved
Reserved
SATA Initialization Field 3 (SIF3) — R/W. BIOS shall always program this field to the value 0Ah.
All other values are reserved.
SATA Initialization Field 2 (SIF2) — R/W. BIOS shall always program this register to the value 1b.
All other values are reserved.
Reserved
SCR Access Enable (SCRAE) — R/W. In non-AHCI mode, this bit allows access to the SATA
SCR registers (SStatus, SControl, and SError registers).
0 = The ABAR (Dev31:F2:Offset 24h) register and MSE bit field (Dev31:F2:Offset 04h:bit 1)
1 = The ABAR (Dev31:F2:Offset 24h) register and MSE bit field (Dev31:F2:Offset 04h:bit 1) are
NOTES:
SATA Initialization Field 1 (SIF1) — R/W. BIOS shall always program this register to the value
182h. All other values are reserved.
1. Using this mode only allows access to AHCI registers PxSSTS, PxSCRTL, PxSERR. All other
2. Proper use of this bit requires:
• ABAR must be programmed to a valid BAR; MSE must be set before software can access
• The Port Implemented bit (D31:F2, Offset ABAR+0Ch) for the corresponding port has to be set
devices.
AHCI space is reserved when this bit is set.
AHCI space.
to allow access to the AHCI port specific PxSSTS, PxSCRTL, and PxSERR registers.
remain as defined.
forced to be read/write.
94h
00000000h
Intel
Description
®
Description
I/O Controller Hub 6 (ICH6) Family Datasheet
Attribute:
Size:
32 bits
R/W