NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 319
NH82801FBM S L89K
Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet
1.NH82801FBM_S_L89K.pdf
(786 pages)
Specifications of NH82801FBM S L89K
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8.3.18
8.3.19
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
SP_MODE—Special Modes Register
(ASF Controller—B1:D8:F0)
Offset Address:
Default Value:
The register contains miscellaneous functions.
INPOLL_TCONF—Inter-Poll Timer Configuration Register
(ASF Controller—B1:D8:F0)
Offset Address:
Default Value:
This register is used to load and hold the value (in increments of 5 ms) for the polling timer. This
value determines how often the ASF polling timer expires which determines the minimum idle
time between sensor polls.
Bit
4:0
Bit
7:0
7
6
5
SMBus Activity Bit (SPE_ACT) — RO.
1 = ASF controller is active with a SMBus transaction. This is an indicator to software that the ASF
Watchdog Status (SPE_WDG) — R/WC.
0 = Software clears this bit by writing a 1 to it.
1 = This bit is set when a watchdog expiration occurs.
Link Loss Status (SPE_LNK) — R/WC.
0 = Software clears this bit by writing a 1 to it.
1 = This bit is set when a link loss occurs (link is down for more than 5 seconds).
Reserved
Inter-Poll Timer Configuration (IPTC_VAL) — R/W. This field identifies the time, in 5.24 ms units
that the ASF controller will wait between the end of the one ASF Poll Alert Message to start on the
next. The value 00h is illegal and unsupported.
controller is still processing commands on the SMBus.
F5h
x0h
F6h
10h
Description
Description
Attribute:
Size:
Attribute:
Size:
LAN Controller Registers (B1:D8:F0)
R/WC, RO
8 bits
R/W
8 bits
319
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