NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 350
NH82801FBM S L89K
Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet
1.NH82801FBM_S_L89K.pdf
(786 pages)
Specifications of NH82801FBM S L89K
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LPC Interface Bridge Registers (D31:F0)
10.1.14
10.1.15
350
GPIOBASE—GPIO Base Address Register (LPC I/F —
D31:F0)
Offset Address:
Default Value:
GC—GPIO Control Register (LPC I/F — D31:F0)
Offset Address:
Default Value:
31:16
15:6
Bit
Bit
5:1
7:5
3:0
0
4
Reserved. Always 0.
Base Address (BA) — R/W. This field provides the 64 bytes of I/O space for GPIO.
Reserved. Always 0.
RO. Hardwired to 1 to indicate I/O space.
Reserved.
GPIO Enable (EN) — R/W. This bit enables/disables decode of the I/O range pointed to by the
GPIO Base Address register (D31:F0:48h) and enables the GPIO function.
0 = Disable.
1 = Enable.
Reserved.
48–4Bh
00000001h
4Ch
00h
Intel
Description
Description
®
I/O Controller Hub 6 (ICH6) Family Datasheet
Attribute:
Size:
Attribute:
Size:
32 bit
R/W, RO
R/W
8 bit
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