NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 311

• Manufacturer Part Number: NH82801FBM S L89K
• Manufacturer: Intel

Specifications of NH82801FBM S L89K

• Lead Free Status / RoHS Status: Compliant

8.3.4
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
ASF_CNTL_EN—ASF Control Enable Register
(ASF Controller—B1:D8:F0)
Offset Address:
Default Value:
This register is used to enable global processing as well as polling. GLOBAL ENABLE controls all
of the SMBus processing and packet creation.
Bit
2:0
7
6
5
4
3
Global Enable (CENA_ALL) — R/W.
0 = Disable
1 = All control and polling enabled
Receive Enable (CENA_RX) — R/W.
0 = Disable
1 = TCO Receives enabled.
Transmit Enable (CENA_TX) — R/W.
0 = Disable
1 = SOS and RMCP Transmits enabled
ASF Polling Enable (CENA_APOL) — R/W.
0 = Disable
1 = Enable ASF Sensor Polling.
Legacy Polling Enable (CENA_LPOL) — R/W.
0 = Disable
1 = Enable Legacy Sensor Polling.
Number of Legacy Poll Devices (CENA_NLPOL) — R/W. This 3-bit value indicates how many of
the eight possible polling descriptors are active.
000 = First polling descriptor is active.
001 = First two polling descriptors are active.
...
111 = Enables all eight descriptors.
E3h
00h
Description
Attribute:
Size:
LAN Controller Registers (B1:D8:F0)
R/W
8 bits
311