NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 698

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NH82801FBM S L89K

Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801FBM S L89K

Lead Free Status / RoHS Status
Compliant
PCI Express* Configuration Registers
19.1.33
19.1.34
698
RCTL—Root Control Register
(PCI Express—D28:F0/F1/F2/F3)
Address Offset:
Default Value:
RSTS—Root Status Register
(PCI Express—D28:F0/F1/F2/F3)
Address Offset:
Default Value:
31:18
15:4
15:0
Bit
Bit
17
16
3
2
1
0
Reserved
PME Interrupt Enable (PIE) — R/W.
0 = Interrupt generation disabled.
1 = Interrupt generation enabled when PCISTS.Inerrupt Status (D28:F0/F1/F2/F3:60h, bit-16) is in
System Error on Fatal Error Enable (SFE) — R/W.
0 = An SERR# will not be generated.
1 = An SERR# will be generated, assuming CMD.SEE (D28:F0/F1/F2/F3:04, bit 8) is set, if a fatal
System Error on Non-Fatal Error Enable (SNE) — R/W.
0 = An SERR# will not be generated.
1 = An SERR# will be generated, assuming CMD.SEE (D28:F0/F1/F2/F3:04, bit 8) is set, if a non-
System Error on Correctable Error Enable (SCE) — R/W.
0 = An SERR# will not be generated.
1 = An SERR# will be generated, assuming CMD.SEE (D28:F0/F1/F2/F3:04, bit 8) if a correctable
Reserved
PME Pending (PP) — RO.
0 = When the original PME is cleared by software, it will be set again, the requestor ID will be
1 = Indicates another PME is pending when the PME status bit is set.
PME Status (PS) — R/WC.
0 = PME was not asserted.
1 = Indicates that PME was asserted by the requestor ID in RID. Subsequent PMEs are kept
PME Requestor ID (RID) — RO. Indicates the PCI requestor ID of the last PME requestor. Valid
only when PS is set.
a set state (either due to a 0 to 1 transition, or due to this bit being set with RSTS.IS already
set).
error is reported by any of the devices in the hierarchy of this root port, including fatal errors in
this root port.
fatal error is reported by any of the devices in the hierarchy of this root port, including non-fatal
errors in this root port.
error is reported by any of the devices in the hierarchy of this root port, including correctable
errors in this root port.
updated, and this bit will be cleared.
pending until this bit is cleared.
5C
0000h
60
00000000h
63h
5Dh
Intel
Description
Description
®
I/O Controller Hub 6 (ICH6) Family Datasheet
Attribute:
Size:
Attribute:
Size:
16 bits
32 bits
R/W
R/WC, RO

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