NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 512
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NH82801FBM S L89K
Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet
1.NH82801FBM_S_L89K.pdf
(786 pages)
Specifications of NH82801FBM S L89K
Lead Free Status / RoHS Status
Compliant
- Current page: 512 of 786
- Download datasheet (5Mb)
UHCI Controllers Registers
13.1.12
13.1.13
13.1.14
512
SVID — Subsystem Vendor Identification Register
(USB—D29:F0/F1/F2/F3)
Address Offset:
Default Value:
Lockable:
SID — Subsystem Identification Register
(USB—D29:F0/F1/F2/F3)
Address Offset:
Default Value:
Lockable:
INT_LN—Interrupt Line Register
(USB—D29:F0/F1/F2/F3)
Address Offset:
Default Value:
15:0
15:0
Bit
Bit
7:0
Bit
Subsystem ID (SID) — R/WO. BIOS sets the value in this register to identify the Subsystem ID. The
SID register, in combination with the SVID register (D29:F0/F1/F2/F3:2C), enables the operating
system to distinguish each subsystem from other(s). The value read in this register is the same as
what was written to the IDE_SID register.
NOTE: The software can write to this register only once per core well reset. Writes should be done
Interrupt Line (INT_LN) — RO. This data is not used by the ICH6. It is to communicate to software
the interrupt line that the interrupt pin is connected to.
Subsystem Vendor ID (SVID) — R/WO. BIOS sets the value in this register to identify the
Subsystem Vendor ID. The USB_SVID register, in combination with the USB Subsystem ID register,
enables the operating system to distinguish each subsystem from the others.
NOTE: The software can write to this register only once per core well reset. Writes should be done
as a single, 16-bit cycle.
as a single, 16-bit cycle.
2Ch–2Dh
0000h
No
2Eh
0000h
No
–
2Fh
3Ch
00h
Intel
Description
Description
Description
®
I/O Controller Hub 6 (ICH6) Family Datasheet
Attribute:
Size:
Power Well:
Attribute:
Size:
Power Well:
Attribute:
Size:
R/WO
16 bits
Core
R/WO
16 bits
Core
R/W
8 bits
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