NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 253
NH82801FBM S L89K
Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet
1.NH82801FBM_S_L89K.pdf
(786 pages)
Specifications of NH82801FBM S L89K
Lead Free Status / RoHS Status
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7.1.11
7.1.12
7.1.13
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
ULD—Upstream Link Descriptor Register
Offset Address:
Default Value:
ULBA—Upstream Link Base Address Register
Offset Address:
Default Value:
RP1D—Root Port 1 Descriptor Register
Offset Address:
Default Value:
31:24
23:16
63:32
31:24
23:16
15:2
31:0
15:2
Bit
Bit
Bit
1
0
1
0
Target Port Number (PN) — R/WO. This field is programmed by platform BIOS to match the port
number of the (G)MCH RCRB that is attached to this RCRB.
Target Component ID (TCID) — R/WO. This field is programmed by platform BIOS to match the
component ID of the (G)MCH RCRB that is attached to this RCRB.
Reserved
Link Type (LT) — RO. This bit indicates that the link points to the (G)MCH RCRB.
Link Valid (LV) — RO. This bit indicates that the link entry is valid.
Base Address Upper (BAU) — R/WO. This field is programmed by platform BIOS to match the
upper 32-bits of base address of the (G)MCH RCRB that is attached to this RCRB.
Base Address Lower (BAL) — R/WO. This field is programmed by platform BIOS to match the
lower 32-bits of base address of the (G)MCH RCRB that is attached to this RCRB.
Target Port Number (PN) — RO. This field indicates the target port number is 1h (root port #1).
Target Component ID (TCID) — R/WO. This field returns the value of the ESD.CID (offset
0104h, bits 23:16) field programmed by platform BIOS, since the root port is in the same
component as the RCRB.
Reserved
Link Type (LT) — RO. This bit indicates that the link points to a root port.
Link Valid (LV) — RO. When FD.PE1D (offset 3418h, bit 16) is set, this link is not valid (returns
0). When FD.PE1D is cleared, this link is valid (returns 1).
0110–0113h
00000001h
0118–011Fh
0000000000000000h
0120–0123h
01xx0002h
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
Chipset Configuration Registers
R/WO, RO
32-bit
R/WO
64-bit
R/WO, RO
32-bit
253
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