NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 533

• Manufacturer Part Number: NH82801FBM S L89K
• Manufacturer: Intel

Specifications of NH82801FBM S L89K

• Lead Free Status / RoHS Status: Compliant

14.1.12
14.1.13
14.1.14
14.1.15
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
SID—USB EHCI Subsystem ID Register
(USB EHCI—D29:F7)
Address Offset:
Default Value:
Reset:
CAP_PTR—Capabilities Pointer Register
(USB EHCI—D29:F7)
Address Offset:
Default Value:
INT_LN—Interrupt Line Register
(USB EHCI—D29:F7)
Address Offset:
Default Value:
INT_PN—Interrupt Pin Register
(USB EHCI—D29:F7)
Address Offset:
Default Value:
15:0
Bit
7:0
Bit
7:0
Bit
7:0
Bit
Capabilities Pointer (CAP_PTR) — RO. This register points to the starting offset of the USB 2.0
capabilities ranges.
Interrupt Line (INT_LN) — R/W. This data is not used by the Intel
register to communicate to software the interrupt line that the interrupt pin is connected to.
Interrupt Pin — RO. This reflects the value of D29IP.EIP (Chipset Configuration Registers:Offset
3108:bits 31:28).
NOTE: Bits 7:4 are always 0h
Subsystem ID (SID) — R/W (special). BIOS sets the value in this register to identify the Subsystem
ID. This register, in combination with the Subsystem Vendor ID register, enables the operating
system to distinguish each subsystem from other(s).
NOTE: Writes to this register are enabled when the WRT_RDONLY bit (D29:F7:80h, bit 0) is set
to 1.
2E
XXXXh
None
34h
50h
3Ch
00h
3Dh
See Description
–
2Fh
Description
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
EHCI Controller Registers (D29:F7)
RO
8 bits
R/W
8 bits
RO
8 bits
R/W (special)
16 bits
®
ICH6. It is used as a scratchpad
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