NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 662
NH82801FBM S L89K
Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet
1.NH82801FBM_S_L89K.pdf
(786 pages)
Specifications of NH82801FBM S L89K
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Intel
18.2.19
18.2.20
18.2.21
662
®
High Definition Audio Controller Registers (D27:F0)
CORBSIZE—CORB Size Register
CORBST—CORB Status Register
(Intel
Memory Address: HDBAR + 4Dh
Default Value:
(Intel
Memory Address: HDBAR + 4Eh
Default Value:
RIRBLBASE—RIRB Lower Base Address Register
(Intel
Memory Address: HDBAR + 50h
Default Value:
31:7
Bit
7:1
Bit
7:4
3:2
1:0
Bit
6:0
0
®
®
®
Reserved.
CORB Memory Error Indication (CMEI) — R/WC. If this bit is set, the controller has detected an
error in the path way between the controller and memory. This may be an ECC bit error or any other
type of detectable data error which renders the command data fetched invalid.
Software can clear this bit by writing a 1 to it. However, this type of error leaves the audio subsystem
in an unviable state and typically required a controller reset by writing a 0 to the Controller Reset #
bit (HDBAR + 08h: bit 0).
CORB Size Capability — RO. Hardwired to 0100b indicating that the ICH6 only supports a CORB
size of 256 CORB entries (1024B)
Reserved.
CORB Size — RO. Hardwired to 10b which sets the CORB size to 256 entries (1024B)
CORB Lower Base Address — R/W. Lower address of the Response Input Ring Buffer, allowing
the RIRB base address to be assigned on any 128-B boundary. This register field must not be
written when the DMA engine is running or the DMA transfer may be corrupted.
RIRB Lower Base Unimplemented Bits — RO. Hardwired to 0. This required the RIRB to be
allocated with 128-B granularity to allow for cache line fetch optimizations.
High Definition Audio Controller—D27:F0)
High Definition Audio Controller—D27:F0)
High Definition Audio Controller—D27:F0)
00h
42h
00000000h
Intel
Description
Description
Description
®
I/O Controller Hub 6 (ICH6) Family Datasheet
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
32 bits
R/WC
8 bits
RO
8 bits
R/W, RO
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