NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 683
NH82801FBM S L89K
Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet
1.NH82801FBM_S_L89K.pdf
(786 pages)
Specifications of NH82801FBM S L89K
Lead Free Status / RoHS Status
Compliant
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19.1.13
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
IOBL—I/O Base and Limit Register
(PCI Express—D28:F0/F1/F2/F3)
Address Offset:
Default Value:
15:12
11:8
Bit
7:4
3:0
I/O Limit Address (IOLA) — R/W. I/O Base bits corresponding to address lines 15:12 for 4-KB
alignment. Bits 11:0 are assumed to be padded to FFFh.
I/O Limit Address Capability (IOLC) — R/O. Indicates that the bridge does not support 32-bit I/O
addressing.
I/O Base Address (IOBA) — R/W. I/O Base bits corresponding to address lines 15:12 for 4-KB
alignment. Bits 11:0 are assumed to be padded to 000h.
I/O Base Address Capability (IOBC) — R/O. Indicates that the bridge does not support 32-bit I/O
addressing.
1C–1Dh
0000h
Description
Attribute:
Size:
PCI Express* Configuration Registers
R/W, RO
16 bits
683
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