NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 316
NH82801FBM S L89K
Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet
1.NH82801FBM_S_L89K.pdf
(786 pages)
Specifications of NH82801FBM S L89K
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LAN Controller Registers (B1:D8:F0)
8.3.13
8.3.14
316
PET_SEQ1—PET Sequence 1 Register
(ASF Controller—B1:D8:F0)
Offset Address:
Default Value:
This register (low byte) holds the current value of the PET sequence number. This field is read/
write-able through this register, and is also automatically incremented by the hardware when new
PET packets are generated. By policy, software should not write to this register unless transmission
is disabled.
PET_SEQ2—PET Sequence 2 Register
(ASF Controller—B1:D8:F0)
Offset Address:
Default Value:
This register (high byte) holds the current value of the PET sequence number. This field is read/
write-able through this register, and is also automatically incremented by the hardware when new
PET packets are generated. By policy, software should not write to this register unless transmission
is disabled.
7:0
7:0
Bit
Bit
PET Sequence Byte 1 (PSEQ1_VAL) — R/W. This field provides the low byte.
PET Sequence Byte 2 (PSEQ2_VAL) — R/W. This field provides the high byte.
F0h
00h
F1h
00h
Intel
Description
Description
®
I/O Controller Hub 6 (ICH6) Family Datasheet
Attribute:
Size:
Attribute:
Size:
R/W
8 bits
R/W
8 bits
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