NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 701
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NH82801FBM S L89K
Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet
1.NH82801FBM_S_L89K.pdf
(786 pages)
Specifications of NH82801FBM S L89K
Lead Free Status / RoHS Status
Compliant
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19.1.42
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
PMC—PCI Power Management Capabilities Register
(PCI Express—D28:F0/F1/F2/F3)
Address Offset:
Default Value:
15:11
Bit
8:6
2:0
10
9
5
4
3
PME_Support (PMES) — RO. This field indicates PME# is supported for states D0, D3
D3
legacy operating systems to enable PME# in devices connected behind this root port.
D2_Support (D2S) — RO. The D2 state is not supported.
D1_Support (D1S) — RO The D1 state is not supported.
Aux_Current (AC) — RO. Reports 375 mA maximum suspend well current required when in the
D3
Device Specific Initialization (DSI) — RO. This bit indicates that no device-specific initialization is
required.
Reserved
PME Clock (PMEC) — RO. This bit indicates that PCI clock is not required to generate PME#.
Version (VS) — RO. This field indicates support for Revision 1.1 of the PCI Power Management
Specification .
COLD
COLD
. The root port does not generate PME#, but reporting that it does is necessary for some
state.
A2
C802h
–
A3h
Description
Attribute:
Size:
PCI Express* Configuration Registers
RO
16 bits
HOT
and
701
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