NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 567

• Manufacturer Part Number: NH82801FBM S L89K
• Manufacturer: Intel

Specifications of NH82801FBM S L89K

• Lead Free Status / RoHS Status: Compliant

15.1.10
15.1.11
15.1.12
15.1.13
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
SVID—Subsystem Vendor Identification Register
(SMBus—D31:F2/F4)
Address Offset:
Default Value:
Lockable:
SID—Subsystem Identification Register
(SMBus—D31:F2/F4)
Address Offset:
Default Value:
Lockable:
INT_LN—Interrupt Line Register (SMBus—D31:F3)
Address Offset:
Default Value:
INT_PN—Interrupt Pin Register (SMBus—D31:F3)
Address Offset:
Default Value:
15:0
15:0
Bit
Bit
Bit
7:0
Bit
7:0
Subsystem Vendor ID (SVID) — RO. The SVID register, in combination with the Subsystem ID (SID)
register, enables the operating system (OS) to distinguish subsystems from each other. The value
returned by reads to this register is the same as that which was written by BIOS into the IDE SVID
register.
NOTE: Software can write to this register only once per core well reset. Writes should be done as a
Subsystem ID (SID) — RO. The SID register, in combination with the SVID register, enables the
operating system (OS) to distinguish subsystems from each other. The value returned by reads to
this register is the same as that which was written by BIOS into the IDE SID register.
NOTE: Software can write to this register only once per core well reset. Writes should be done as a
Interrupt Line (INT_LN) — R/W. This data is not used by the ICH6. It is to communicate to software
the interrupt line that the interrupt pin is connected to PIRQB#.
Interrupt PIN (INT_PN) — RO. This field reflects the value of D31IP.SMIP in chipset configuration
space.
single 16-bit cycle.
single 16-bit cycle.
2Ch
0000h
No
2Eh
0000h
No
3Ch
00h
3Dh
See description
–
–
2Fh
2Dh
Attribute:RO
Size: 16 bits
Power Well:Core
Attribute:R/WO
Size: 16 bits
Power Well:Core
Description
Description
Description
Description
Attributes:
Size:
Attributes:
Size:
SMBus Controller Registers (D31:F3)
R/W
8 bits
RO
8 bits
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