DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 84

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 2 CPU
2.4.8
Table 2.17 Floating Point Operation Instructions
Page 56 of 1190
Instruction
FABS
FABS
FADD
FADD
FCMP/EQ
FCMP/EQ
FCMP/GT
FCMP/GT
FCNVDS
FCNVSD
FDIV
FDIV
FLDI0
FLDI1
FLDS
FLOAT
FLOAT
FMAC
FMOV
FMOV
FMOV.S
FMOV.D
FMOV.S
FMOV.D
FRn
DRn
FRm, FRn
DRm, DRn
FRm, FRn
DRm, DRn
FRm, FRn
DRm, DRn
DRm, FPUL
FPUL, DRn
FRm, FRn
DRm, DRn
FRn
FRn
FRm, FPUL
FPUL,FRn
FPUL,DRn
FR0,FRm,FRn
FRm, FRn
DRm, DRn
@(R0, Rm), FRn
@(R0, Rm), DRn
@Rm+, FRn
@Rm+, DRn
Floating Point Operation Instructions
Instruction Code
1111nnnn01011101
1111nnn001011101
1111nnnnmmmm0000
1111nnn0mmm00000
1111nnnnmmmm0100
1111nnn0mmm00100
1111nnnnmmmm0101
1111nnn0mmm00101
1111mmm010111101
1111nnn010101101
1111nnnnmmmm0011
1111nnn0mmm00011
1111nnnn10001101
1111nnnn10011101
1111mmmm00011101
1111nnnn00101101
1111nnn000101101
1111nnnnmmmm1110
1111nnnnmmmm1100
1111nnn0mmm01100
1111nnnnmmmm0110
1111nnn0mmmm0110
1111nnnnmmmm1001
1111nnn0mmmm1001
Operation
|FRn|→FRn
|DRn|→DRn
FRn+FRm→FRn
DRn+DRm→DRn
(FRn=FRm)? 1:0→T
(DRn=DRm)? 1:0→T
(FRn>FRm)? 1:0→T
(DRn>DRm)? 1:0→T
(float)DRm→FPUL
(double)FPUL→DRn
FRn/FRm→FRn
DRn/DRm→DRn
0×00000000→FRn
0×3F800000→FRn
FRm→FPUL
(float)FPUL→FRn
(double)FPUL→DRn
FR0×FRm+FRn→FRn
FRm→FRn
DRm→DRn
(R0+Rm) →FRn
(R0+Rm) →DRn
(Rm) →FRn, Rm+=4
(Rm) →DRn, Rm+=8
Execution
Cycles
1
1
1
6
1
2
1
2
2
2
10
23
1
1
1
1
2
1
1
2
1
2
1
2
T Bit
⎯
⎯
⎯
⎯
Operation
result
Operation
result
Operation
result
Operation
result
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
R01UH0026EJ0300 Rev. 3.00
SH2E
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Compatibility
SH4
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
SH7201 Group
Sep 24, 2010
SH-2A/
SH2A-FPU
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes