DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 1061

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

SH7201 Group
The address map gives information on the on-chip I/O registers and is configured as described
below.
1. Register Addresses (address order)
• Registers are described by functional module, in order of the corresponding section numbers.
• Access to reserved addresses that are not described in this register address list is prohibited.
• When addresses consist of 16 or 32 bits, the addresses of the MSBs are given when big-endian
2. Register Bits
• Bit configurations of the registers are described in the same order as the Register Addresses
• Reserved bits are indicated by - in the bit name.
• No entry in the bit-name column indicates that the whole register is allocated as a counter or
• When registers consist of 16 or 32 bits, the bits are given from the MSB side. The listing order
3. Register States in Each Operating Mode
• Register states are described in the same order as the Register Addresses (address order).
• For the initial state of each bit, refer to the description of the register in the corresponding
• The register states described are for the basic operating modes. If there is a specific reset for an
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
mode is selected.
(address order).
for holding data.
of bytes is based on big-endian mode.
section.
on-chip peripheral module, refer to the section on that on-chip peripheral module.
Section 28 List of Registers
Section 28 List of Registers
Page 1033 of 1190