DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 109
![IC SH7201 MPU ROMLESS 176LQFP](/photos/28/61/286154/176-lqfp_sml.jpg)
DS72011RB120FPV
Manufacturer Part Number
DS72011RB120FPV
Description
IC SH7201 MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheet
1.R0K572011S000BE.pdf
(1222 pages)
Specifications of DS72011RB120FPV
Core Size
32-Bit
Core Processor
SH-2A
Speed
120MHz
Connectivity
CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
176-LQFP
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
120MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-20°C To +70°C
Embedded Interface Type
I2C, SSI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DS72011RB120FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 109 of 1222
- Download datasheet (8Mb)
SH7201 Group
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Clock
Operating
Mode
3
FRQCR
Setting
H'1101
H'1103
H'1104
H'1105
H'1106
H'1111
H'1113
H'1114
H'1115
H'1116
H'1202
H'120C
H'1206
H'1222
H'1224
H'122C
H'1226
H'122E
H'1303
H'1305
H'1306
H'1313
H'1315
H'1316
H'1333
H'1335
H'1336
PLL
Circuit 1
ON (×2)
ON (×2)
ON (×2)
ON (×2)
ON (×2)
ON (×2)
ON (×2)
ON (×2)
ON (×2)
ON (×2)
ON (×3)
ON (×3)
ON (×3)
ON (×3)
ON (×3)
ON (×3)
ON (×3)
ON (×3)
ON (×4)
ON (×4)
ON (×4)
ON (×4)
ON (×4)
ON (×4)
ON (×4)
ON (×4)
ON (×4)
PLL Frequency
Multiplier
PLL
Circuit 2
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
Ratio of
Internal Clock
Frequencies
(I:B:P)
2:1:1
2:1:1/2
2:1:1/3
2:1:1/4
2:1:1/6
1:1:1
1:1:1/2
1:1:1/3
1:1:1/4
1:1:1/6
3:1:1
3:1:1/2
3:1:1/4
1:1:1
1:1:1/2
1:1:1/2
1:1:1/4
1:1:1/4
4:1:1
4:1:1/2
4:1:1/3
2:1:1
2:1:1/2
2:1:1/3
1:1:1
1:1:1/2
1:1:1/3
*
1
Input Clock
20 to 40
20 to 60
20 to 60
20 to 60
20 to 60
20 to 40
20 to 60
20 to 60
20 to 60
20 to 60
20 to 40
40
20 to 40
20 to 40
20 to 40
20 to 60
20 to 40
40 to 60
20 to 30
20 to 30
20 to 30
20 to 40
20 to 50
20 to 50
20 to 40
20 to 50
20 to 50
*
2
Output Clock
(CKIO Pin)
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Selectable Frequency Range (MHz)
*
3
CPU Clock
(Iφ)
40 to 80
40 to 120
40 to 120
40 to 120
40 to 120
20 to 40
20 to 60
20 to 60
20 to 60
20 to 60
60 to 120
120
60 to 120
20 to 40
20 to 40
40 to 60
20 to 40
40 to 60
80 to 120
80 to 120
80 to 120
40 to 80
40 to 100
40 to 100
20 to 40
20 to 50
20 to 50
Section 4 Clock Pulse Generator (CPG)
*
3
Bus Clock
(Bφ)
20 to 40
20 to 60
20 to 60
20 to 60
20 to 60
20 to 40
20 to 60
20 to 60
20 to 60
20 to 60
20 to 40
40
20 to 40
20 to 40
20 to 40
40 to 60
20 to 40
40 to 60
20 to 30
20 to 30
20 to 30
20 to 40
20 to 50
20 to 50
20 to 40
20 to 50
20 to 50
*
3
Page 81 of 1190
Peripheral
Clock (Pφ)
20 to 40
10 to 30
6.67 to 20
5 to 15
3.33 to 10
20 to 40
10 to 30
6.67 to 20
5 to 15
3.33 to 10
20 to 40
20
5 to 10
20 to 40
10 to 20
20 to 30
5 to 10
10 to 15
20 to 30
10 to 15
6.67 to 10
20 to 40
10 to 25
6.67 to 16.67
20 to 40
10 to 25
6.67 to 16.67
*
3
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