DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 155

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

SH7201 Group
6.3.8
IBCR is a 16-bit register that enables or disables use of register banks for each interrupt priority
level. IBCR is initialized to H'0000 by a power-on reset or in deep standby mode.
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Initial value:
R/W:
Bit:
Bank Control Register (IBCR)
R/W
Bit Name
E15
E14
E13
E12
E11
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
⎯
E15
15
0
R/W
E14
14
0
R/W
E13
13
0
Initial
Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
E12
12
0
R/W
E11
11
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
E10
10
0
Description
Enable
These bits enable or disable use of register banks for
interrupt priority levels 15 to 1. However, use of register
banks is always disabled for the user break interrupts.
0: Use of register banks is disabled
1: Use of register banks is enabled
Reserved
This bit is always read as 0. The write value should
always be 0.
R/W
E9
9
0
R/W
E8
8
0
R/W
E7
7
0
R/W
E6
6
0
R/W
E5
5
0
Section 6 Interrupt Controller (INTC)
R/W
E4
4
0
R/W
E3
3
0
R/W
E2
2
0
Page 127 of 1190
R/W
E1
1
0
—
R
0
0