DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 1201

IC SH7201 MPU ROMLESS 176LQFP

DS72011RB120FPV

Manufacturer Part Number
DS72011RB120FPV
Description
IC SH7201 MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheet

Specifications of DS72011RB120FPV

Core Size
32-Bit
Core Processor
SH-2A
Speed
120MHz
Connectivity
CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
176-LQFP
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
120MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-20°C To +70°C
Embedded Interface Type
I2C, SSI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS72011RB120FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
SH7201 Group
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
18.2 Input/Output Pins
Table 18.1 Pin Assignments
18.3.1 Control Register (SSICR)
18.4.1 Bus Format
Table 18.3 Bus Format for SSI
Module
18.4.2 Non-Compressed Modes
(3) Master Receiver
(4) Master Transmitter
(5) Operating Setting Related to
Word Length
Item
Page
775
778
779
789
790
790
Revision (See Manual for Details)
Table amended
Table amended
Table amended
Table amended
Description amended
The non-compressed modes support all serial audio
streams split into channels. It supports I
format as well as many more variants on these
modes.
Description amended
... select signals are internally derived from the
oversampling clock.
Description amended
... signals are internally derived from the oversampling
clock.
Description amended
All bits related to the SSICR's word length are valid in
non-compressed modes. The SSI module supports
many configurations, but the formats described below
are I
first right-aligned.
Pin Name
AUDIO_CLK
AUDIO_X1
AUDIO_X1
Bit
14
Bit
15
TRMD
SCKD
2
S compatible, MSB-first left-aligned, and MSB-
Bit Name
SWSD
Bit Name
SCKD
Non-Compressed
Slave Receiver
0
0
Number of Pins
1
1
1
Initial
Value
0
Initial
Value
0
R/W
R/W
R/W
R/W
Non-Compressed
Slave Transmitter
1
0
I/O
Input
Input
Output
Description
Serial Bit Clock Direction
0: Serial bit clock is input, slave mode.
1: Serial bit clock is output, master mode.
Note: Only the following settings are allowed:
Description
Serial WS Direction
0: Serial word select is input, slave mode.
1: Serial word select is output, master mode.
Note: Only the following settings are allowed:
(SCKD, SWSD) = (0,0) and (1,1). Other settings
are prohibited.
(SCKD, SWSD) = (0,0) and (1,1). Other settings
are prohibited.
Description
Crystal oscillator for audio (Oversample clock)
External clock for audio (Oversample clock)
Main Revisions for This Edition
Non-Compressed
Master Receiver
0
1
2
Page 1173 of 1190
S compatible
Non-Compressed
Master Transmitter
1
1

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