DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 796

IC SH7201 MPU ROMLESS 176LQFP

DS72011RB120FPV

Manufacturer Part Number
DS72011RB120FPV
Description
IC SH7201 MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheet

Specifications of DS72011RB120FPV

Core Size
32-Bit
Core Processor
SH-2A
Speed
120MHz
Connectivity
CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
176-LQFP
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
120MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-20°C To +70°C
Embedded Interface Type
I2C, SSI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS72011RB120FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 17 I
(1) Normal case
Synchronous
clock*
SCL pin
Internally
monitored SCL
(2) When SCL is driven low at first by the slave device
Synchronous
clock*
SCL pin
Internally
monitored SCL
(3) When the rising speed of SCL is slow
Synchronous
clock*
SCL pin
Internally
monitored SCL
Page 768 of 1190
1
1
1
Notes: 1. Clock whose transfer rate is set by bits CKS[3:0] in I
2. 3 to 4 t
2
C Bus Interface 3 (IIC3)
Internal delay*
pcyc
Internal delay*
Time for
monitoring SCL
Time for
monitoring SCL
Time for
monitoring SCL
Slave low
level output
when the NF2CYC bit in NF2CYC is 0 and 4 to 5 t
V
IH
Internal delay*
Monitored value is high level
2
Figure 17.22 Bit Synchronous Circuit Timing
V
V
Monitored value
is low level
IH
IH
2
Monitored value
is low level
SCL not driven to low level
SCL not driven
to low level
2
Time for
monitoring SCL
Monitored value
is high level
2
C bus control register 1 (ICCR1).
pcyc
when the NF2CYC bit is 1.
Time for
monitoring SCL
V
IH
Internal delay*
Monitored value
is high level
2
R01UH0026EJ0300 Rev. 3.00
The rate is slower
than the settings.
SH7201 Group
Sep 24, 2010

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