DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 613

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

SH7201 Group
(17) Operation when Error Occurs during Phase Counting Mode Operation, and Operation
Figure 12.143 shows an explanatory diagram of the case where an error occurs in phase counting
mode and operation is restarted in normal mode after re-setting.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. Set in normal mode.
11. Initialize the pins with TIOR.
12. Set MTU2 output with the PFC.
13. Operation is restarted by TSTR.
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Figure 12.143 Error Occurrence in Phase Counting Mode, Recovery in Normal Mode
After a power-on reset, MTU2 output is low and ports are in the high-impedance state.
Set phase counting mode.
compare-match occurrence.)
Set MTU2 output with the PFC.
The count operation is started by TSTR.
Output goes low on compare-match occurrence.
An error occurs.
Set port output with the PFC and output the inverse of the active level.
The count operation is stopped by TSTR.
Initialize the pins with TIOR. (The example shows initial high output, with low output on
is Restarted in Normal Mode
MTU2
module output
TIOC*A
TIOC*B
Port output
PB, PC, PD*
PB, PC, PD*
Notes: 1. This pin is multiplexed with TIOC*A.
2. This pin is multiplexed with TIOC*B.
1
2
Power-on
reset
1
TMDR
(PCM)
2
Hi-Z
Hi-Z
0 out)
TIOR
(1 init
3
(MTU2)
PFC
4
TSTR
(1)
5
Match
6
occurs
Error
7
(PORT)
Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
PFC
8
TSTR
(0)
9
(normal)
TMDR
10
0 out)
TIOR
(1 init
11
(MTU2)
PFC
12
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TSTR
(1)
13