DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 687

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

SH7201 Group
15.3.17 RTC Control Register 2 (RCR2)
RCR2 is a register for periodic interrupt control, 30-second adjustment ADJ, divider circuit
RESET, and RTC count control.
RCR2 is initialized to H'09 by a power-on reset or in deep standby mode. Bits other than the
RTCEN and START bits are initialized by a manual reset. It is not initialized in software standby
mode, and retains its contents.
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Bit
7
6 to 4
Bit Name
PEF
PES[2:0]
Initial value:
Initial
Value
0
000
R/W:
Bit:
R/W
PEF
7
0
R/W
R/W
R/W
R/W
6
0
Description
Periodic Interrupt Flag
Indicates interrupt generation with the period
designated by the PES2 to PES0 bits. When set to 1,
PEF generates periodic interrupts.
0: Interrupts not generated with the period designated
[Clearing condition]
•
1: Interrupts generated with the period designated by
[Setting condition]
•
These bits specify the periodic interrupt.
000: No periodic interrupts generated
001: Periodic interrupt generated every 1/256 second
010: Periodic interrupt generated every 1/64 second
011: Periodic interrupt generated every 1/16 second
100: Periodic interrupt generated every 1/4 second
101: Periodic interrupt generated every 1/2 second
110: Periodic interrupt generated every 1 second
111: Periodic interrupt generated every 2 seconds
Interrupt Enable Flags
PES[2:0]
R/W
by the bits PES2 to PES0.
the PES2 to PES0 bits.
5
0
When 0 is written to PEF
When an interrupt is generated with the period
designated by the bits PES0 to PES2 or when 1 is
written to the PEF flag
R/W
0
4
RTCEN ADJ
R/W
3
1
R/W
2
0
RESET START
R/W
1
0
R/W
Section 15 Realtime Clock (RTC)
0
1
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