DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 752
![IC SH7201 MPU ROMLESS 176LQFP](/photos/28/61/286154/176-lqfp_sml.jpg)
DS72011RB120FPV
Manufacturer Part Number
DS72011RB120FPV
Description
IC SH7201 MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheet
1.R0K572011S000BE.pdf
(1222 pages)
Specifications of DS72011RB120FPV
Core Size
32-Bit
Core Processor
SH-2A
Speed
120MHz
Connectivity
CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
176-LQFP
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
120MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-20°C To +70°C
Embedded Interface Type
I2C, SSI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DS72011RB120FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 16 Serial Communication Interface with FIFO (SCIF)
• Transmitting and Receiving Serial Data Simultaneously (Clocked Synchronous Mode)
Figure 16.16 shows a sample flowchart for transmitting and receiving serial data simultaneously.
Use the following procedure for the simultaneous transmission/reception of serial data, after
enabling the SCIF for transmission/reception.
Page 724 of 1190
Figure 16.16 Sample Flowchart for Transmitting/Receiving Serial Data
No
No
No
Start of transmission and reception
and read 1 from TDFE and TEND
End of transmission and reception
Write transmit data to SCFTDR,
flags in SCFTDR, then clear
Read ORER flag in SCLSR
Read TDFE flag in SCFSR
Read RDF flag in SCFSR
SCFRDR, and clear RDF
Clear TE and RE bits
Read receive data in
flag in SCFSR to 0
All data received?
these flags to 0
in SCSCR to 0
Initialization
ORER = 1?
TDFE = 1?
RDF = 1?
Yes
No
Yes
Yes
[1]
Error handling
[4]
[3]
Yes
[2]
Note:
[1] SCIF status check and transmit data
[2] Receive error handling:
[3] SCIF status check and receive data
[4] Serial transmission and reception
Read SCFSR and check that the
To continue serial transmission and
write:
TDFE flag is set to 1, then write
transmit data to SCFTDR , and
read 1 from the TDFE and TEND
flags, then clear these flags to 0. The
transition of the TDFE flag from 0 to 1
can also be identified by a TXI
interrupt.
identify any error, perform the
appropriate error handling, then clear
the ORER flag to 0. Reception cannot
be resumed while the ORER flag is
set to 1.
read:
1, then read the receive data in
SCFRDR, and clear the RDF flag to
0. The transition of the RDF flag from
0 to 1 can also be identified by an RXI
interrupt.
continuation procedure:
reception, read 1 from the RDF flag
and the receive data in SCFRDR, and
clear the RDF flag to 0 before
receiving the MSB in the current
frame. Similarly, read 1 from the
TDFE flag to confirm that writing is
possible before transmitting the MSB
in the current frame. Then write data
to SCFTDR and clear the TDFE flag
to 0.
Read the ORER flag in SCLSR to
Read SCFSR and check that RDF =
When switching from a transmit operation
or receive operation to simultaneous
transmission and reception operations,
clear the TE and RE bits to 0, and then
set them simultaneously to 1.
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010
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