DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 339
![IC SH7201 MPU ROMLESS 176LQFP](/photos/28/61/286154/176-lqfp_sml.jpg)
DS72011RB120FPV
Manufacturer Part Number
DS72011RB120FPV
Description
IC SH7201 MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheet
1.R0K572011S000BE.pdf
(1222 pages)
Specifications of DS72011RB120FPV
Core Size
32-Bit
Core Processor
SH-2A
Speed
120MHz
Connectivity
CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
176-LQFP
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
120MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-20°C To +70°C
Embedded Interface Type
I2C, SSI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DS72011RB120FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 339 of 1222
- Download datasheet (8Mb)
SH7201 Group
11.3.6
DMRBCT is a register used to set the number for reloading to the DMA current byte count
register (DMCBCTn).
To enable reloading, set the DMA byte count reload function enable bit (BRLOD) in the DMA
control register A (DMCNTAn) to 1. In this case, set both the DMA current byte count register
(DMCBTn) and DMA reload byte count address register (DMRBCTn).
Note: Set this register so that DMA transfer is performed within the correctly aligned address
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Bit
31 to 26 ⎯
25 to 0
Initial value:
Initial value:
R/W:
R/W:
boundaries for the transfer sizes listed below.
Bit:
Bit:
•
•
DMA Reload Byte Count Register (DMRBCT)
Bit Name
RBC
R/W
When the transfer size is set to 16 bits (SZSEL = "001"): (b0) = "0".
When the transfer size is set to 32 bits (SZSEL = "010"): (b1, b0) = (0, 0).
31
—
15
—
R
0
R/W
30
—
14
—
R
0
R/W
29
—
13
—
R
0
Initial
Value
All 0
Undefined R/W
R/W
28
—
12
—
R
0
R/W
27
—
11
—
R
0
R/W
R
R/W
26
—
10
—
R
0
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Number of bytes to be DMA-transferred after reloading
R/W
R/W
25
—
—
9
R/W
R/W
24
—
—
8
RBC
R/W
R/W
23
—
—
7
Section 11 Direct Memory Access Controller (DMAC)
R/W
R/W
22
—
—
6
R/W
R/W
21
—
—
5
RBC
R/W
R/W
20
—
—
4
R/W
R/W
19
—
—
3
R/W
R/W
18
—
—
2
Page 311 of 1190
R/W
R/W
17
—
—
1
R/W
R/W
16
—
—
0
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