DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 124

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 5 Exception Handling
Note:
Table 5.4
Notes: 1. Vector table address offset: See table 5.3.
Page 96 of 1190
Exception Sources
(Reserved by system)
Trap instruction (user vector)
External interrupts (IRQ, PINT), on-chip
peripheral module interrupts *
Exception Source
Resets
Address errors, bus errors,
register bank errors, interrupts,
instructions
* The vector numbers and vector table address offsets for each external interrupt and on-
2. Vector number: See table 5.3.
chip peripheral module interrupt are given in table 6.4 in section 6, Interrupt Controller
(INTC).
Calculating Exception Handling Vector Table Addresses
Vector Table Address Calculation
Vector table address = (vector table address offset)
Vector table address = VBR + (vector table address offset)
Vector
Numbers
19
31
32
63
64
255
:
:
:
= (vector number) × 4
= VBR + (vector number) × 4
Vector Table Address Offset
H'0000004C to H'0000004F
H'0000007C to H'0000007F
H'00000080 to H'00000083
H'000000FC to H'000000FF
H'00000100 to H'00000103
H'000003FC to H'000003FF
:
:
:
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010