DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 693
![IC SH7201 MPU ROMLESS 176LQFP](/photos/28/61/286154/176-lqfp_sml.jpg)
DS72011RB120FPV
Manufacturer Part Number
DS72011RB120FPV
Description
IC SH7201 MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheet
1.R0K572011S000BE.pdf
(1222 pages)
Specifications of DS72011RB120FPV
Core Size
32-Bit
Core Processor
SH-2A
Speed
120MHz
Connectivity
CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
176-LQFP
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
120MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-20°C To +70°C
Embedded Interface Type
I2C, SSI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DS72011RB120FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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SH7201 Group
15.5
15.5.1
Do not write to the count registers (RSECCNT, RMINCNT, RHRCNT, RDAYCNT, RWKCNT,
RMONCNT, and RYRCNT) during the RTC counting (while the START bit in RCR2 is 1). If any
of the count registers is written to during the RTC counting, the count register may not be read
correctly immediately after the execution of a write instruction. The RTC counting must be
stopped before writing to any of the count registers.
15.5.2
The method of using the periodic interrupt function is shown in figure 15.5.
A periodic interrupt can be generated periodically at the interval set by the flags PES0 to PES2 in
RCR2. When the time set by the PES0 to PES2 has elapsed, the PEF is set to 1.
The PEF is cleared to 0 upon periodic interrupt generation or when the flags PES0 to PES2 are set.
Periodic interrupt generation can be confirmed by reading this bit, but normally the interrupt
function is used.
15.5.3
When a transition to standby mode is made after registers in the RTC are set, sometimes counting
is not performed correctly. In case the registers are set, be sure to make a transition to standby
mode after waiting for two count clocks or more.
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Usage Notes
Register Writing during RTC Count
Use of Realtime Clock (RTC) Periodic Interrupts
Transition to Standby Mode after Setting Register
Figure 15.5 Using Periodic Interrupt Function
Elapse of time set by PES
Set PES, clear PEF
Clear PEF
Set PES0 to PES2,
and clear PEF to 0,
in RCR2
Clear PEF to 0
Section 15 Realtime Clock (RTC)
Page 665 of 1190
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