DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 1026

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 25 Power-Down Modes
25.2.4
STBCR4 is an 8-bit readable/writable register that controls the operation of modules in power-
down modes. STBCR4 is initialized to H'FF by a power-on reset or in deep standby mode but
retains its previous value by a manual reset or in software standby mode. Only byte access is valid.
Note: When writing to this register, see section 25.4, Usage Note.
Page 998 of 1190
Bit
1
0
Bit
7
6
Standby Control Register 4 (STBCR4)
Bit Name
MSTP31
⎯
Bit Name
MSTP47
MSTP46
Initial value:
Initial
Value
1
1
Initial
Value
1
1
R/W:
Bit:
MSTP
R/W
47
7
1
R/W
R/W
R
R/W
R/W
R/W
MSTP
R/W
46
6
1
MSTP
R/W
Description
Module Stop 31
When the MSTP31 bit is set to 1, the supply of the
clock to the DAC is halted.
0: DAC runs.
1: Clock supply to DAC halted.
Reserved
This bit is always read as 1. The write value should
always be 1.
Description
Module Stop 47
When the MSTP47 bit is set to 1, the supply of the
clock to the SCIF0 is halted.
0: SCIF0 runs.
1: Clock supply to SCIF0 halted.
Module Stop 46
When the MSTP46 bit is set to 1, the supply of the
clock to the SCIF1 is halted.
0: SCIF1 runs.
1: Clock supply to SCIF1 halted.
45
5
1
MSTP
R/W
44
4
1
MSTP
R/W
43
3
1
MSTP
R/W
42
2
1
MSTP
R/W
41
1
1
MSTP
R/W
40
1
0
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010