DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 743

IC SH7201 MPU ROMLESS 176LQFP

DS72011RB120FPV

Manufacturer Part Number
DS72011RB120FPV
Description
IC SH7201 MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheet

Specifications of DS72011RB120FPV

Core Size
32-Bit
Core Processor
SH-2A
Speed
120MHz
Connectivity
CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
176-LQFP
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
120MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-20°C To +70°C
Embedded Interface Type
I2C, SSI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS72011RB120FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
SH7201 Group
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Read receive data in SCFRDR
and ORER flag in SCLSR, to 0
Clear DR, ER, BRK flags
Overrun error handling
Receive error handling
Break handling
Error handling
Figure 16.7 Sample Flowchart for Receiving Serial Data (cont)
ORER = 1?
in SCFSR,
BRK = 1?
ER = 1?
DR = 1?
End
Yes
Yes
Yes
Yes
No
No
No
No
Whether a framing error or parity error has occurred in
the receive data that is to be read from the receive
FIFO data register (SCFRDR) can be ascertained
from the FER and PER bits in the serial status register
(SCFSR).
When a break signal is received, receive data is not
transferred to SCFRDR while the BRK flag is set.
However, note that the last data in SCFRDR is H'00,
and the break data in which a framing error occurred
is stored.
Section 16 Serial Communication Interface with FIFO (SCIF)
Page 715 of 1190

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