DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 54

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 2 CPU
2.3
2.3.1
Instructions are RISC type. This section details their functions.
(1)
Basic instructions have a fixed length of 16 bits, improving program code efficiency.
(2)
The SH-2A additionally features 32-bit fixed-length instructions, improving performance and ease
of use.
(3)
Each basic instruction can be executed in one cycle using the pipeline system.
(4)
Longword is the standard data length for all operations. Memory can be accessed in bytes, words,
or longwords. Byte or word data in memory is sign-extended and handled as longword data.
Immediate data is sign-extended for arithmetic operations or zero-extended for logic operations. It
is also handled as longword data.
Table 2.2
Note: @(disp, PC) accesses the immediate data.
Page 26 of 1190
SH-2A CPU
MOV.W
ADD
.DATA.W
16-Bit Fixed-Length Instructions
32-Bit Fixed-Length Instructions
One Instruction per State
Data Length
Instruction Features
RISC-Type Instruction Set
@(disp,PC),R1
R1,R0
.........
H'1234
Sign Extension of Word Data
Description
Data is sign-extended to 32
bits, and R1 becomes
H'00001234. It is next
operated upon by an ADD
instruction.
Example of Other CPU
ADD.W
#H'1234,R0
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010