DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 347

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

SH7201 Group
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Bit
29, 28
27, 26
25, 24
23 to 18 ⎯
DSEL[1:0]
Bit Name
MDSEL
[1:0]
⎯
Initial
Value
00
All 0
00
All 0
R/W
R/W
R
R/W
R
Description
DMA Transfer Mode Selection
These bits are used to specify the DMA transfer mode.
Setting these bits to "00" selects cycle-stealing transfer
mode.
Setting these bits to "01" selects pipelined transfer
mode.
Do not set these bits to "10" or "11". Operation is not
guaranteed if these settings are made. For details, see
section 11.4.1, DMA Transfer Mode.
00: Cycle-stealing transfer
01: Pipelined transfer
10: Setting prohibited
11: Setting prohibited
Note:
Reserved
These bits are always read as 0. The write value
should always be 0.
DMA Transfer Condition Selection
These bits are used to specify the conditions of DMA
transfer.
Setting these bits to "00" selects single operand
transfer.
Setting these bits to "01" selects sequential operand
transfer.
Setting these bits to "11" selects non-stop transfer. For
details, see section 11.4.2, DMA Transfer Condition.
Do not set these bits to "10". Operation is not
guaranteed if this setting is made.
00: Unit operand transfer
01: Sequential operand transfer
10: Setting prohibited
11: Non-stop transfer
Reserved
These bits are always read as 0. The write value
should always be 0.
Pipelined transfer through a single BIU is not
possible. For details on the BIU, see section
11.1, Features.
Section 11 Direct Memory Access Controller (DMAC)
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