DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 1048

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 26 User Debugging Interface (H-UDI)
26.2
Table 26.1 Pin Configuration
Note:
Page 1020 of 1190
Pin Name
H-UDI serial data
input/output clock pin
Mode select input pin
H-UDI reset input pin
H-UDI serial data
input pin
H-UDI serial data
output pin
ASE mode select pin
* The pin with the pull-up function.
Input/Output Pins
Symbol
UDTCK*
UDTMS*
UDTRST* Input
UDTDI*
UDTDO
ASEMD
I/O
Input
Input
Input
Output
Input
Function
Data is serially supplied to the H-UDI from the data
input pin (UDTDI), and output from the data output
pin (UDTDO), in synchronization with this clock. Fix
high when not used.
The state of the TAP control circuit is determined
by changing this signal in synchronization with
UDTCK. For the protocol, see figure 26.2. Fix high
when not used.
Input is accepted asynchronously with respect to
UDTCK, and when low, the H-UDI is reset.
UDTRST must be low for oscillation settling time
when power is turned on. See section 26.4.2,
Reset Types, for more information.
Data transfer to the H-UDI is executed by changing
this signal in synchronization with UDTCK. Fix high
when not used.
Data read from the H-UDI is executed by reading
this pin in synchronization with UDTCK. The initial
value of the data output timing is the UDTCK falling
edge. This can be changed to the UDTCK rising
edge by inputting the UDTDO change timing switch
command to SDIR. See section 26.4.3, UDTDO
Output Timing, for more information.
Fix high.
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010