DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 685

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

SH7201 Group
15.3.16 RTC Control Register 1 (RCR1)
RCR1 is a register that affects carry flags and alarm flags. It also selects whether to generate
interrupts for each flag.
RCR1 is initialized to H'00 by a power-on reset, a manual reset, or in deep standby mode. The CF
flag is retained undefined until the division circuit is reset (the RESET and ADJ bits in RCR2 are
set to 1). When using the CF flag, make sure to reset the divider circuit beforehand. This register is
not initialized in software standby mode.
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Bit
7
6, 5
Bit Name
CF
—
Initial value:
Initial
Value
Undefined R/W
All 0
R/W:
Bit:
R/W
CF
—
7
R/W
R
—
R
6
0
Description
Carry Flag
Status flag that indicates that a carry has occurred. CF
is set to 1 when a count-up to 64-Hz occurs at the
second counter carry or 64-Hz counter read. A count
register value read at this time cannot be guaranteed;
another read is required.
0: No carry of 64-Hz counter by second counter or 64-
[Clearing condition]
•
1: Carry of 64-Hz counter by second counter or 64 Hz
[Setting condition]
•
Reserved
These bits are always read as 0. The write value should
always be 0.
—
Hz counter
counter
R
5
0
When 0 is written to CF
When the second counter or 64-Hz counter is read
during a carry occurrence by the 64-Hz counter, or 1
is written to CF.
R/W
CIE
0
4
R/W
AIE
3
0
—
R
2
0
—
R
1
0
R/W
Section 15 Realtime Clock (RTC)
AF
0
0
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