DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 1051

IC SH7201 MPU ROMLESS 176LQFP

DS72011RB120FPV

Manufacturer Part Number
DS72011RB120FPV
Description
IC SH7201 MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheet

Specifications of DS72011RB120FPV

Core Size
32-Bit
Core Processor
SH-2A
Speed
120MHz
Connectivity
CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
176-LQFP
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
120MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-20°C To +70°C
Embedded Interface Type
I2C, SSI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS72011RB120FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
SH7201 Group
26.4
26.4.1
Figure 26.2 shows the internal states of the TAP controller.
Note: The transition condition is the UDTMS value at the rising edge of UDTCK. The UDTDI
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
value is sampled at the rising edge of UDTCK; shifting occurs at the falling edge of
UDTCK. For details on change timing of the UDTDO value, see section 26.4.3, UDTDO
Output Timing. The UDTDO is at high impedance, except with shift-DR and shift-IR
states. There is a transition to test-logic-reset asynchronously with UDTCK by UDTRST
assertion or deep standby mode.
Operation
TAP Controller
1
0
Test -logic-reset
Run-test/idle
0
Figure 26.2 TAP Controller State Transitions
1
1
0
Select-DR
Capture-DR
Update-DR
1
Pause-DR
Exit1-DR
Exit2-DR
Shift-DR
0
0
1
0
1
1
0
1
0
0
1
Section 26 User Debugging Interface (H-UDI)
1
0
Select-IR
Capture-IR
1
Update-IR
Pause-IR
Exit1-IR
Exit2-IR
0
0
Shift-IR
1
0
1
1
0
1
0
0
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