DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 114

IC SH7201 MPU ROMLESS 176LQFP

DS72011RB120FPV

Manufacturer Part Number
DS72011RB120FPV
Description
IC SH7201 MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheet

Specifications of DS72011RB120FPV

Core Size
32-Bit
Core Processor
SH-2A
Speed
120MHz
Connectivity
CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
176-LQFP
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
120MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-20°C To +70°C
Embedded Interface Type
I2C, SSI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS72011RB120FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 4 Clock Pulse Generator (CPG)
4.4.2
CKIOCR is an 8-bit readable/writable register used to control output of the CKIO pin. When this
LSI is started in clock operating mode 3, writing 1 to this register is invalid.
When this LSI is started in clock operating mode 3, CKIOCR is initialized to H'00 by a power-on
reset caused by the RES pin or in deep standby mode. When this LSI is started in clock operating
mode 0 or 2, CKIOCR is initialized to H'01 by a power-on reset caused by the RES pin or in deep
standby mode. This register is not initialized by an internal reset triggered by an overflow of the
WDT, a manual reset, in sleep mode, or in software standby mode.
Note:
Page 86 of 1190
Bit
7 to 1
0
* The initial value depends on the clock operating mode of the LSI.
CKIO Control Register (CKIOCR)
Bit Name
CKIOOE
Initial value:
Initial
Value
All 0
0/1*
R/W:
Bit:
R
7
0
R/W
R
R/W
R
6
0
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
CKIO Output Enable
Enables output of the CKIO pin.
0: Output from CKIO is not enabled.
1: Output from CKIO is enabled.
R
5
0
R
4
0
R
3
0
R
2
0
R
1
0
CKIO
R/W
OE
0/1*
0
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010

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