DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 1213

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

SH7201 Group
Instruction format ..................................... 34
Instruction set ........................................... 38
Integer division instructions.................... 110
Interrupt exception handling................... 107
Interrupt exception handling vectors
and priorities ........................................... 137
Interrupt priority level............................. 106
Interrupt response time ........................... 149
IRQ interrupts ......................................... 134
J
Jump table base register (TBR) ................ 22
L
List of registers ..................................... 1033
Load-store architecture ............................. 27
Local acceptance filter mask (LAFM) .... 823
Logic operation instructions ..................... 51
LRU ........................................................ 183
M
Mailbox................................................... 814
Mailbox control ...................................... 815
Mailbox structure.................................... 818
Manual reset ........................................... 100
Master receive operation......................... 751
Master transmit operation ....................... 749
Measurement circuit ............................. 1150
Memory-mapped cache .......................... 194
Message control field.............................. 819
Message data fields................................. 824
Message receive sequence ...................... 867
Message transmission sequence.............. 865
Micro processor interface (MPI)............. 814
Module standby function ...................... 1017
MTU2 functions ..................................... 368
MTU2 interrupts ..................................... 532
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
MTU2 module timing ........................... 1138
MTU2 output pin initialization ............... 566
Multi mode.............................................. 889
Multi-function timer pulse unit 2
(MTU2)................................................... 367
Multiplexed pin table (Port A) ................ 927
Multiplexed pin table (Port B) ................ 929
Multiplexed pin table (Port C) ................ 931
Multiplexed pin table (Port D) ................ 933
Multiplexed pin table (Port E) ................ 934
Multiplexed pin table (Port F)................. 934
Multiply and accumulate register
high (MACH)............................................ 22
Multiply and accumulate register
low (MACL) ............................................. 22
Multiply/Multiply-and-accumulate
operations.................................................. 27
N
NaN........................................................... 66
NMI interrupt .......................................... 133
Noise filter .............................................. 761
Nonlinearity error.................................... 898
Non-numbers (NaN) ................................. 65
Note on making a transition to
deep standby mode................................ 1016
Note on using a PLL oscillation circuit..... 90
Note on using crystal resonator................. 89
O
Offset error.............................................. 898
On-chip peripheral module interrupts ..... 135
On-chip RAM ......................................... 989
Operation in asynchronous mode............ 708
Operation in clocked synchronous
mode........................................................ 717
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