DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 274

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 9 Bus State Controller (BSC)
(c)
If an 8-bit bus is selected by the external bus width select bits in the CSn control register, A27 to
A0 are enabled as address signals for byte units. Table 9.9 shows the data alignment
corresponding to byte addresses for different data sizes.
With an 8-bit bus channel only the WR0 pin is enabled, regardless of the strobe mode setting. A
low-level signal is output to WR0 during write access. BC0 constantly outputs low level. Pins
WR3 to WR1 and pins BC3 to BC1 are not used.
Table 9.9
Note: The valid bits in the data bus for each data size are indicated by circles (O).
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Data Size
Byte
Word
Longword
8-Bit Bus Channel
Crosses (×) indicate bus data bits that are undefined.
Asterisks (*) indicate write/byte control bits that are disabled (fixed high level).
Data Alignment (8-Bit Bus Channel)
Byte Address
(Lower 2 Bits) [31:24] [23:16] [15:8] [7:0]
0
1
2
3
0 (1st)
1 (2nd)
2 (1st)
3 (2nd)
0 (1st)
1 (2nd)
2 (3rd)
3 (4th)
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
DATA
×
×
×
×
×
×
×
×
×
×
×
×
O
O
O
O
O
O
O
O
O
O
O
O
[3]
*
*
*
*
*
*
*
*
*
*
*
*
[2]
*
*
*
*
*
*
*
*
*
*
*
*
R01UH0026EJ0300 Rev. 3.00
WR/BC
[1]
*
*
*
*
*
*
*
*
*
*
*
*
SH7201 Group
Sep 24, 2010
[0]
L
L
L
L
L
L
L
L
L
L
L
L