DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 280

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 9 Bus State Controller (BSC)
(7)
SDRAMC supports an SDRAM power-down mode. In power-down mode the SDCKE signal from
SDRAMC goes low level. While in power-down mode auto-refresh operations are performed at
the interval specified by the auto-refresh request interval setting (DRFC) bits in SDRAM refresh
control register 1 (SDRFCNT1). The SDCKE signal only goes high when an auto-refresh
command is issued.
Transition to and recovery from power-down mode are performed using the SDRAM power-down
control register (SDPWDCNT).
Setting the DPWD bit to 1 causes SDRAMC to transition to power-down mode. Clearing the
DPWD bit to 0 causes SDRAMC to recover from power-down mode.
The SDCKE signal from SDRAMC goes high level when recovery from power-down mode
occurs.
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Power-Down Mode
CKIO
SDCKE
SDRAM command
CKIO
SDCKE
Figure 9.12 Auto-Refresh Operation in SDRAMC Power-Down Mode
Figure 9.11 SDRAMC Power-Down Mode
Auto-refresh command
SDRAMC power-down mode
SDRAMC power-down mode
RFA
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010