DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 236

IC SH7201 MPU ROMLESS 176LQFP

DS72011RB120FPV

Manufacturer Part Number
DS72011RB120FPV
Description
IC SH7201 MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheet

Specifications of DS72011RB120FPV

Core Size
32-Bit
Core Processor
SH-2A
Speed
120MHz
Connectivity
CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
176-LQFP
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
120MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-20°C To +70°C
Embedded Interface Type
I2C, SSI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS72011RB120FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 9 Bus State Controller (BSC)
Notes: 1. The initial value of the BSIZE bits in CS0 differs depending on the settings of pins MD1
To disable the operation for each channel, forcibly write out data tentatively stored in internal
write buffer. The procedure is as follows:
1. Execute read access to the channel whose operation is to be disabled.
2. Then, write 0 to the EXENB bit (operation disabled).
Page 208 of 1190
Bit
21, 20
19 to 17 ⎯
16
15 to 0
2. The initial value of the EXENB bit in CS0 is 1.
EXENB
Bit Name
BSIZE[1:0]
and MD0.
Initial
Value
00*
All 0
0*
All 0
2
1
R/W
R/W
R
R/W
R
Description
External Bus Width Select
These bits specify the width of the data bus for the
external device of the corresponding channel of CSC.
The initial value for the data bus width for CSC channel
0 (CS0) differs depending on the settings of pins MD1
and MD0.
10: 8-bit bus
00: 16-bit bus
01: 32-bit bus
Reserved
These bits are always read as 0. The write value
should always be 0.
Operation Enable
This bit enables or disables the operation for the
corresponding channel of CSC. The initial value
corresponding to CS0 only is operation enabled
(EXENB = 1).
0: Operation disabled
1: Operation enabled
Reserved
These bits are always read as 0. The write value
should always be 0.
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010

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