DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 1200

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Main Revisions for This Edition
Page 1172 of 1190
Item
17.4.5 Slave Receive Operation
Figure 17.12 Slave Receive
Mode Operation Timing (2)
17.6 Bit Synchronous Circuit
Table 17.5 Time for Monitoring
SCL
17.7.1 Issuance of Stop
Condition and Start Condition
(Retransmission)
17.7.2 Note on Setting for Multi-
Master Operation
17.7.3 Reading ICDRR in Master
Receive Mode
17.7.3 Note on Master Receive
Mode
17.7.4 Note on Setting ACKBT in
Master Receive Mode
17.7.5 Note on the States of Bits
MST and TRN when Arbitration is
Lost
17.7.6 Note on IICRST and
BBSY bits
Section 18 Serial Sound
Interface (SSI)
Page
757
769
770
770
—
770
770
771
771
773
Revision (See Manual for Details)
Figure amended
(Master output)
(Master output)
Table amended
Description deleted
... may not be output correctly.
Description replaced
Description deleted
Newly added
Newly added
Newly added
Newly added
Description amended
The serial sound interface (hereinafter referred to as
the "SSI") is a transceiver module designed to send or
receive audio data interface with a variety of devices
compatible with I
CKS3
0
1
(Slave output)
(Slave output)
processing
ICDRS
ICDRR
RDRF
SCL
SDA
SCL
SDA
User
A
9
CKS2
0
1
0
1
Bit 7
1
2
S bus.
Bit 6
Data 1
2
Bit 5
3
Time for Monitoring SCL*
9 tpcyc*
21 tpcyc*
39 tpcyc*
87 tpcyc*
Bit 4
4
2
2
2
2
Bit 3
5
R01UH0026EJ0300 Rev. 3.00
Bit 2
6
Bit 1
7
1
[3] Read ICDRR
Bit 0
8
SH7201 Group
A
Sep 24, 2010
9
[4] Read ICDRR
Data 1
Data 2