DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 81

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

SH7201 Group
2.4.6
Table 2.15 Branch Instructions
Note:
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Instruction
BF
BF/S
BT
BT/S
BRA
BRAF
BSR
BSRF
JMP
JSR
JSR/N
JSR/N
RTS
RTS/N
RTV/N
* One cycle when the program does not branch.
label
label
label
label
label
Rm
label
Rm
@Rm
@Rm
@Rm
@@(disp8,TBR) 10000011dddddddd
Rm
Branch Instructions
Instruction Code
10001011dddddddd
10001111dddddddd
10001001dddddddd
10001101dddddddd
1010dddddddddddd
0000mmmm00100011
1011dddddddddddd
0000mmmm00000011
0100mmmm00101011
0100mmmm00001011
0100mmmm01001011
0000000000001011
0000000001101011
0000mmmm01111011
Operation
When T = 0, disp × 2 + PC →
PC,
When T = 1, nop
Delayed branch
When T = 0, disp × 2 + PC →
PC,
When T = 1, nop
When T = 1, disp × 2 + PC →
PC,
When T = 0, nop
Delayed branch
When T = 1, disp × 2 + PC →
PC,
When T = 0, nop
Delayed branch,
disp × 2 + PC → PC
Delayed branch,
Rm + PC → PC
Delayed branch, PC → PR,
disp × 2 + PC → PC
Delayed branch, PC → PR,
Rm + PC → PC
Delayed branch, Rm → PC
Delayed branch, PC → PR,
Rm → PC
PC-2 → PR, Rm → PC
PC-2 → PR,
(disp × 4 + TBR) → PC
Delayed branch, PR → PC
PR → PC
Rm → R0, PR → PC
Execu-
tion
Cycles
3/1*
2/1*
3/1*
2/1*
2
2
2
2
2
2
3
5
2
3
3
T Bit
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
SH2,
SH2E SH4
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Compatibility
Page 53 of 1190
Section 2 CPU
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
SH-2A
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes