DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 302

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 9 Bus State Controller (BSC)
(13) External Address/SDRAM Address Signal Multiplex
(a)
Either of addresses used for accessing external device or SDRAM is output through external
address pins. The SDRAM address is shifted internally by changing the settings of DDBW and
DSZ in SDmADR and BSIZE in SDCmCNT. The bank address is output on A16 and A15 and the
address is output on A14 to A2.
Table 9.16 External Address/SDRAM Address Pins
(b)
Tables 9.17 to 9.19 are the SDRAM configurations that to support for 8-, 16-, or 32-bit bus width.
These tables are featured to ease the understanding of the relationships between the SDRAM to
support and address multiplex.
Addresses addr27 to addr0 are the logical addresses used by the CPU and DMAC in access to the
SDRAM. The table below shows how the settings of DSZ and DDBW determine which signals
are output on the SDRAM-access pins.
Page 274 of 1190
Pin Name
A27
A26
A25
A24
A23
A22
A21
A20
A19
A18
A17
A16 (/BA1)
A15 (/BA0)
A14 (/MA12) External address/SDRAM address
Address Multiplex
Address Register Setting Value and Supported SDRAM Configuration
Function
External address
External address
External address
External address
External address
External address
External address
External address
External address
External address
External address
External address/SDRAM bank address
External address/SDRAM bank address
Pin Name
A13 (/MA11) External address/SDRAM address
A12 (/MA10) External address/SDRAM address
A11 (/MA9)
A10 (/MA8)
A9 (/MA7)
A8 (/MA6)
A7 (/MA5)
A6 (/MA4)
A5 (/MA3)
A4 (/MA2)
A3 (/MA1)
A2 (/MA0)
A1
A0
Function
External address/SDRAM address
External address/SDRAM address
External address/SDRAM address
External address/SDRAM address
External address/SDRAM address
External address/SDRAM address
External address/SDRAM address
External address/SDRAM address
External address/SDRAM address
External address/SDRAM address
External address
External address
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010