DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 466

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
12.3.20 Timer Output Control Register 2 (TOCR2)
TOCR2 is an 8-bit readable/writable register that controls output level inversion of PWM output
in complementary PWM mode and reset-synchronized PWM mode.
Page 438 of 1190
Bit
7, 6
5
4
3
2
1
Bit Name
BF[1:0]
OLS3N
OLS3P
OLS2N
OLS2P
OLS1N
Initial value:
Initial
value
00
0
0
0
0
0
R/W:
Bit:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7
0
BF[1:0]
R/W
6
0
Description
TOLBR Buffer Transfer Timing Select
These bits select the timing for transferring data from
TOLBR to TOCR2.
For details, see table 12.32.
This bit selects the output level on TIOC4D in reset-
synchronized PWM mode/complementary PWM mode.
See table 12.33.
This bit selects the output level on TIOC4B in reset-
synchronized PWM mode/complementary PWM mode.
See table 12.34.
This bit selects the output level on TIOC4C in reset-
synchronized PWM mode/complementary PWM mode.
See table 12.35.
This bit selects the output level on TIOC4A in reset-
synchronized PWM mode/complementary PWM mode.
See table 12.36.
This bit selects the output level on TIOC3D in reset-
synchronized PWM mode/complementary PWM mode.
See table 12.37.
Output Level Select 3N*
Output Level Select 3P*
Output Level Select 2N*
Output Level Select 2P*
Output Level Select 1N*
OLS3N OLS3P OLS2N OLS2P OLS1N OLS1P
R/W
5
0
R/W
4
0
R/W
3
0
R/W
2
0
R/W
1
0
R/W
0
0
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010