DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 281

IC SH7201 MPU ROMLESS 176LQFP

DS72011RB120FPV

Manufacturer Part Number
DS72011RB120FPV
Description
IC SH7201 MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheet

Specifications of DS72011RB120FPV

Core Size
32-Bit
Core Processor
SH-2A
Speed
120MHz
Connectivity
CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
176-LQFP
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
120MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-20°C To +70°C
Embedded Interface Type
I2C, SSI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS72011RB120FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
SH7201 Group
(8)
SDRAMC supports an SDRAM deep-power-down mode. In deep-power-down mode SDRAMC
issues a deep-power-down command and drives the SDCKE signal low level.
Transition to and recovery from deep-power-down mode are performed using the SDRAM deep-
power-down control register (SDDPDCNT).
Setting the DDPD bit to 1 causes SDRAMC to put all channels into deep-power-down mode.
Clearing the DDPD bit to 0 causes SDRAMC to recover from deep-power-down mode.
During recovery from deep-power-down mode, SDRAMC issues a deep-power-down exit
command and drives the SDCKE signal high level.
Following recovery from deep-power-down exit, wait for the duration designated for the SDRAM
being used and then execute an initialization sequence.
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Deep-Power-Down Mode
CKIO
SDCKE
SDRAM command
Figure 9.13 SDRAMC Deep-Power-Down Mode
Deep-power-down command
DPD
SDRAMC deep-power-down mode
Deep-power-down exit command
Section 9 Bus State Controller (BSC)
DPDX
Page 253 of 1190

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