DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 260

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 9 Bus State Controller (BSC)
9.4.16
SDSTR consists of the status flags that indicate the status of operation during self-refresh,
initialization sequences, power-down mode, deep-power-down mode, and mode register setting.
Page 232 of 1190
Bit
31 to 5
4
3
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
SDRAM Status Register (SDSTR)
Bit Name
⎯
DSRFST
DINIST
31
15
—
—
R
R
0
0
—
—
30
14
R
R
0
0
—
—
29
13
Initial
Value
All 0
0
0
R
R
0
0
—
—
28
12
R
R
0
0
—
—
27
11
R
R
0
0
R/W
R
R
R
—
—
26
10
R
R
0
0
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Self-Refresh Transition/Recovery Status
When set to 1, this bit indicates that a transition to or
recovery from self-refresh operation is in progress for
channel SDRAM0 or SDRAM1.
0: Transition/recovery not in progress
1: Transition/recovery in progress
Initialization Status
When set to 1, this bit indicates that an initialization
sequence is in progress for channel SDRAM0 or
SDRAM1. This bit has the same function as the
DINIST bit in SDIR1.
0: Initialization sequence not in progress
1: Initialization sequence in progress
—
—
25
R
R
0
9
0
24
—
—
R
R
0
8
0
23
—
—
R
R
0
7
0
22
—
—
R
R
0
6
0
21
—
—
R
R
0
5
0
DSRF
20
—
ST
R
R
0
4
0
R01UH0026EJ0300 Rev. 3.00
DINI
19
—
ST
R
R
0
3
0
DPWD
18
—
ST
R
R
0
2
0
SH7201 Group
DDPD
17
—
Sep 24, 2010
ST
R
R
0
1
0
DMRS
16
—
ST
R
R
0
0
0