DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 651

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

SH7201 Group
Notes: 1. Includes switching from low to stop, and from stop to low.
13.8.7
If 16-bit counter mode and compare match count mode are specified at the same time, input clocks
for TCNT_0 and TCNT_1 are not generated, and the counter stops. Do not specify 16-bit counter
mode and compare match count mode simultaneously.
13.8.8
Operation of the TMR can be disabled or enabled using the standby control register. The initial
setting is for operation of the TMR to be halted. Register access is enabled by clearing module
standby mode. For details, see section 25, Power-Down Modes.
13.8.9
If module standby mode is entered when an interrupt has been requested, it will not be possible to
clear the CPU interrupt source. Interrupts should therefore be disabled before entering module
standby mode.
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
No.
4
2. Includes switching from stop to high.
3. Includes switching from high to stop.
4. Generated because the change of the signal levels is considered as a falling edge;
Mode Setting with Cascaded Connection
Module Standby Setting
Interrupts in Module Standby Mode
Timing to Change CKS1
and CKS0 Bits
Switching from high to high
TCNT is incremented.
TCNT Clock Operation
Clock before
switchover
Clock after
switchover
TCNT input
clock
TCNT
N
N + 1
Section 13 8-Bit Timers (TMR)
CKS bits changed
N + 2
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