DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 295

IC SH7201 MPU ROMLESS 176LQFP

DS72011RB120FPV

Manufacturer Part Number
DS72011RB120FPV
Description
IC SH7201 MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheet

Specifications of DS72011RB120FPV

Core Size
32-Bit
Core Processor
SH-2A
Speed
120MHz
Connectivity
CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
176-LQFP
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
120MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-20°C To +70°C
Embedded Interface Type
I2C, SSI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS72011RB120FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
SH7201 Group
• Multiple Write Timing Setting Examples
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Figures 9.33 to 9.35 show the correspondence between the timing of multiple write operations
involving 4 data units and the set values of the SDRAMm timing register (SDmTR). Table
9.13 shows the SDRAMm timing register (SDmTR) set values for each figure.
CKIO
SDRAM command
Data bus
CKIO
SDRAM command
Data bus
ACT: Row and bank activation command
RD:
PRA: Precharge-all command
(ACT-PRA)
DRAS
Figure 9.31 Multiple Read Timing Example 2
Figure 9.32 Multiple Read Timing Example 3
ACT
ACT: Row and bank activation command
RD:
PRA: Precharge-all command
(ACT-RD)
(ACT-PRA)
Read command
DRCD
DRAS
ACT
Read command
(ACR-RD)
DRCD
DSL
DSL
RD
(RD-d)
DCL
RD
(RD-d)
RD
DCL
Multiple read
RD
Multiple read
RD
RD
d0
RD
d0
RD
d1
PRA
d1
(PRA-next)
Section 9 Bus State Controller (BSC)
DPCG
PRA
d2
(PRA-next)
DPCG
DSL
d2
DSL
d3
DSL
d3
Page 267 of 1190

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