DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 642

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 13 8-Bit Timers (TMR)
13.5.2
The CMFA and CMFB flags in TCSR are set to 1 by a compare match signal generated when the
TCOR and TCNT values match. The compare match signal is generated at the last state in which
the match is true, just before the timer counter is updated. Therefore, when the TCOR and TCNT
values match, the compare match signal is not generated until the next TCNT clock input. Figure
13.6 shows this timing.
13.5.3
When a compare match signal is generated, the timer output changes as specified by bits OS3 to
OS0 in TCSR. Figure 13.7 shows the timing when the timer output is toggled by the compare
match A signal.
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P
Compare match A
signal
Timer output pin
Timing of CMFA and CMFB Setting at Compare Match
Timing of Timer Output at Compare Match
P
TCNT
TCOR
Compare match
signal
CMF
Figure 13.7 Timing of Toggled Timer Output at Compare Match A
Figure 13.6 Timing of CMF Setting at Compare Match
N
N
N + 1
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010